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VLSI LAB INSTRUCTIONS
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Pre-lab Preparation * Each lab experiment requires the preparation that may involve a significant amount of work. * The pre-lab work must be completed before arrival at the lab. The pre-lab work will be part of your lab grade and will be evaluated every week. * The student must revise concepts related to Logic design and Verilog Programming before coming to VLSI Lab. Lab Journal The students have to maintain Lab Journals and need to submit the same to the faculty at the start of each lab. Each experiment must be written neatly and include the following details as applicable * Experiment Number and Date * Experiment Title and Objective * Verilog constructs used * Truth table, Logic equation and circuit diagram for combinational circuits (exercise problems only) * State diagram/ stat...